1. Field of the Invention
The present invention relates to the construction of a semiconductor device having a transistor chip fixed on the bottom of a package, the package being formed of a bottom plate, side walls, and a lid, terminal conductors connected to the transistor chip and drawn through the lid of the package to the outside of the package, and diodes connected between the base and emitter of the transistor chip for preventing an overcurrent from flowing through the transistor chip.
2. Description of the Related Art
Japanese Unexamined Patent Publication No. 58-81313 discloses a conventional overcurrent limiting semiconductor device comprising diodes 22 and 23 connected between a base B and emitter E of a transistor 21 as shown in FIG. 8 so that the emitter current I.sub.R is limited to values below a predetermined value. In the prior art device, when the emitter current I.sub.R increases, a voltage drop RI.sub.R across the emitter resistor R increases, causing the sum of the voltage drop RI.sub.R and the base-to-emitter voltage V.sub.BE to become greater than the sum of the forward voltage drops V.sub.F across the diodes 22 and 23. This results in a current I.sub.1. Thus, the following equation holds true: EQU V.sub.BE -V.sub.F +RI.sub.R =0 (1.0)
The emitter current I.sub.R is limited below a certain value due to the fact that the forward I-V curves of the diodes 22 and 23 rise sharply such that the diodes 22 and 23 represent a constant voltage diode having a substantially constant forward voltage V.sub.F. The diode connection of FIG. 8 may also be applied to a Darlington transistor wherein the diodes are connected between the base of the first-stage transistor and the emitter of the final stage transistor.
Conventionally, such overcurrent-limiting type semiconductor devices are of the construction in which a transistor chip is fixed to the bottom of a package, the package being formed of a bottom plate, side walls, and a lid, and respective terminal conductors are connected to the base, emitter, and collector of the transistor chip and are drawn to the outside of the package through the package lid. Further, the current-limiting diodes are disposed in a space between the transistor chip and the lid and are connected between the base and emitter of the transistor by means of the base and emitter terminal conductors.
In the aforementioned prior art overcurrent-limiting type semiconductor devices, the diodes are located between the lid and the transistor chip on the bottom plate. This results in congested internal wiring when a complicated circuit is to be fabricated. The congested wiring may possibly cause the shorting-out of the diode leads and, therefore, difficulties may arise when assembling the device.
For example, if the package is to be made thin for the miniaturization of a power conversion apparatus to which the overcurrent-limiting type semiconductor device is applied, the space between the bottom of the package and the lid will be smaller resulting in further congestion of internal wires. As a result, there may be difficulty in providing sufficient space for accommodating the diodes.
If the diodes are disposed near the transistor chip, heat generated by the transistor chip will cause the forward voltage drop V.sub.F of the diodes to decrease and the resistance of the emitter resistor to increase. These two factors will act on the transistor simultaneously thereby limiting the transistor emitter current to a value much lower than it was designed to be.